IEEE International High Level Design
Validation and Test Workshop 2003

November 12-14, 2003, Hyatt Regency Hotel, San Francisco, California
CALL FOR PAPERS
Call for papers( pdf)
Organizing Committee
General Chair
Masahiro Fujita, U. Tokyo
Program Chair
Alan Hu, U. British Columbia
Vice Program Chair
Ramesh Karri, Polytechnic U.
Past Chair
Ahmed Jerraya, TIMA
Finance Chair
Wolfgang Rosenstiel, Tuebingen U.
Panels Chair
Ian Harris, UC Irvine
Publicity Chair
Bernard Courtois, TIMA
Publications Chair
Avi Ziv, IBM Haifa
Local Arrangements Chair
Vijay Nagasamy, Crimson Microsystems
European Liaison
Paolo Prinetto, Politecnico di Torino
Asian Liaison
Hiroto Yasuura, Kyushu University
Industry Liaison
Robert Jones, Intel
Program Committee
Mark Aagaard, U. Waterloo
Jacob Abraham, U. Texas, Austin
Felice Balarin, Cadence Berkeley Labs
Mike Bartley, Elixent Ltd
Gerard Berry, Esterel Technologies
Tim Cheng, UC Santa Barbara
Hans Eveking, TU Darmstadt
Farzan Fallah, Fujitsu Labs of America
Harry Foster, Jasper Design Automation
Franco Fummi, Univ. di Verona
Kiyoharu Hamaguchi, Osaka U.
Ziyad Hanna, Intel Design Technology
John Hayes, U. Michigan
Yatin Hoskote, Intel Labs
Faraydon Karim, ST Microelectronics
Yaron Kashai, Verisity
Thomas Kropf, Bosch
Luciano Lavagno, Politecnico di Torino
Amitava Majumdar, SUN Microsystems
Peter Marwedel, U. Dortmund
Sreeranga Rajan, Fujitsu Labs of America
Bruno Rouzeyre, LIRMM
Juergen Ruf, IBM
Daniel Saab, Case Western Reserve U.
Patrick Schaumont, UC Los Angeles
Sandeep Shukla, Virginia Tech
Atsushi Takahara, NTT
Li-C. Wang, UC Santa Barbara
Yervant Zorian, Virage Logic Corp
Steering Committee
Sujit Dey, UC San Diego
Alex Orailoglu, UC San Diego
Prab Varma, Veritable, Inc.

HLDVT 2003 is the eighth in a series of annual workshops designed to bring together a community of researchers in the areas of microelectronic design, verification, and test. The workshop revolves around a common theme of addressing the integration of multiple functions on-chip at higher levels of design abstraction, and the techniques and methodologies for validating such systems. The workshop provides an informal forum for discussion of substantive issues that cut across diverse areas in system-level design. Major topics include, but are not limited to, the following:

High Level Design Validation
High Level Design Error Modeling
High Level Test Bench Generation
Testing Core Based Designs
Hardware/Software Co-Testing
Simulation-Based Verification
Emulation and Prototyping
Error Models and Verification Test
Hardware/Software Co-Validation
High Level DFT/Synthesis for Test
High Level ATPG/Fault Simulation
Validation of Microprocessors
Design Error Debug & Diagnosis
Formal Verification Methods
On-Chip Software Testing
High-Level Performance/Power Models

The Program Committee invites authors to submit an extended summary comprising no more than 4 pages (10pt minimum font size, reasonable margins and line spacing) describing original, unpublished recent work. Clearly describe the nature of the work, explain its significance, highlight novel features, and describe its current status. On the title page, please indicate: title, name and affiliations of all authors, and the topic category. Also identify a contact author and provide complete mailing address, phone number, fax number and an e-mail address. Panel proposals are also invited. All submissions must be made electronically in PDF or Postscript format using the paper submission webpage:

http://www.hldvt.com/submissions
Please ensure that your PDF or Postscript file is readable by Acrobat Reader or Ghostview. DEADLINE EXTENSION: The submission deadline has been extended to 11:59pm Pacific Time, July 5, 2003

Authors will be notified of the disposition of their papers by August 18, 2003. The submission of an extended summary or panel proposal will be considered evidence that upon acceptance, the author(s) will present their paper or organize their panel at the workshop. Authors of accepted papers will have the option of including a camera-ready copy of their manuscript in the formal workshop proceedings published by the IEEE Computer Society press. The final manuscript will be due in early September 2003, depending on publishing deadlines. Planning is also underway for selected papers to be invited for a journal special issue.

Additional information and contact addresses are available at the conference website:

http://www.hldvt.com/03
Queries regarding paper submissions and the program can be addressed to the program chair: Alan J. Hu, programchair@hldvt.com. Other queries can be addressed to the general chair: Masahiro Fujita, generalchair@hldvt.com.

HLDVT 2003 is sponsored by the IEEE Computer Society Test Technology Technical Council and the IEEE Computer Society Design Automation Technical Committee.