The 15th IEEE International High Level Design Validation and Test Workshop (HLDVT) advances research in validation and test methodologies for integrated circuits and systems. The workshop focuses on addressing the current bottlenecks in validation and test of complex and heterogeneous systems by both employing high-level specifications (such as register transfer level, behavioral and system-level models) and developing associated tools, techniques and methodologies to enable drastic reduction in overall design, validation and test effort. The workshop provides a forum for leaders in both industry and academia to advance the means for validating, debugging, synthesizing, and testing complex systems in a way that opens new avenues to overcome current validation and test challenges.

This year, HLDVT provides rich program with five regular sessions, five special sessions, one tutorial, one panel and one keynote speech. There are several areas of intense focus. First, there is one session on firmware validation and a session on HW-dependent software, to highlight the importance of embedded software. A session and a panel will be devoted to multi-clock systems and clock domain crossing verification, deployed in a variety of scenarios. One session will be devoted to transaction-level modeling, and another one will deal with high-level arithmetic circuit descriptions to obtain more from the circuits. Industry leaders in Electronic System Level (ESL) design will bring forward their perspectives on verification challenges at ESL, and a variety of papers will deal with formal verification advances, constraint solving, coverage and verification accelerators and emulators. The final program is available here.